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WARRIOR
2 months ago
7

8.14 Consider a system in which bus cycles takes 500 ns. Transfer of bus control in either direction, from processor to I/O devi

ce or vice versa, takes 250 ns. One of the I/O devices has a data transfer rate of 50 KB/s and employs DMA. Data are transferred 1 byte at a time. a. Suppose we employ DMA in a burst mode. That is, the DMA interface gains bus mastership prior to the start of a block transfer and maintains control of the bus until the whole block is transferred. For how long would the device tie up the bus when transferring a block of 128 bytes? b. Repeat the calculation for cycle-​stealing mode.
Computers and Technology
1 answer:
Harlamova29_29 [1K]2 months ago
4 0

Answer:

A) 2.56 ms

B) 128 μs

Explanation:

Time per bus cycle = 500 ns

Time taken to transfer bus control = 250 ns

Data transfer rate of the I/O device = 50 KB/s

Data is transferred one byte at a time.

A) Calculate the time the device occupies the bus during the transfer of a block of 128 bytes

Block size for transfer = 128 bytes

Bandwidth available = 50 KB/s

data transfer = (Block size ) / ( Bandwidth)

                     = ( 128 * 8 ) / ( 50 * 10^3 * 8 )

                     = ( 1024 ) / ( 50 * 10^3 * 8 )

                     = 2.56 ms

To compute the actual time taken for transfer, we incorporate the time required for control in both directions:

2.56 ms + 500 ns = 2.56 ms. This is because 500 ns is negligible.

B) cycle stealing mode

In this mode, each byte is transferred individually. The total control time for both directions will be twice the overall time, meaning 2 * 500 ns = 1000 ns. An extra control time of 250 ns is necessary at both ends.

Since 1 byte is transferred at once, the transfer time for 1 byte is 1 μs.

Thus, for 128 bytes = 128 * 1 μs = 128 μs.

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